Cache optimization.

Write a program that sorts an array using a sorting algorithm of your choice.

The size of the array will be located at the address array_size, the integer array (32-bit integer words) will start at the address array_start.

The program should sort the array in ascending order. Your program will be tested with different array sizes and different values in the array.

Set the parameters of the cache by using #pragma cache:policy,sets,words_in_blocks,ways,write_method on a separate line in your task submission. For example: #pragma cache:lru,1,1,1,wb

This parameter will be passed to qtrvsim_cli as the --d-cache parameter.

• The allowed maximal cache capacity is limited to 16 32-bit words.
• The length of the official evaluation dataset to sort is in the range of 24 to 32 words.
• The initial main memory memory access latency is set to 10 cycles.
• The burst latency 2 is configured for the following consecutive accesses.

The complete task description can also be found here, Makefile and template files for your own testing can be found on GitLab.

Input: Bubble sort algorithm.

Your program will be run with the following arguments: --dump-cycles --cycle-limit 10000 --read-time 10 --write-time 10 --burst-time 2 --asm submission.S
Your program will be scored by this following metric: Runtime of the program in cycles.

For interactive solution, you can use QtRvSim. The web version of the simulator is located here.

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